Interrupt Structure of 89C51
1. 89C51 Micro-controller has six interrupt sources that they can recognize 6 different interrupt events that can interrupt regular program execution. They are as follows-
- Two hardware interrupts
- Two Timer/Counter interrupts
- One serial communication interrupt
- One reset
2. Each interrupt can be enabled or disabled by setting bits in the IE register and also, the complete interrupt system can be disabled by clearing bit EA from the IE register.
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3. 89C51 has two external interrupts i.e. INT0
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and INT1 .
4. When the bits IT0 and IT1 in the TCON register are set, then interrupt will occur on changing logic state from 1 to 0.
5. When the bits IT0 and IT1 in the TCON register is cleared, the same signal will generate interrupt request and it will be continuously executed as far as the pins are held low.
6. Interrupt Enable Register (IE Register) By configuring the Interrupt Enable (IE) register we can enable or disable the various available interrupt.
7. The bits 7th to 0th of the IE SFR are used to enable or disable the particular interrupts, where as the 8th bit is used to enable or disable all interrupts.
8. Hence, when the 8th bit of IE is 0, then all interrupts are disabled whether an individual interrupt is enable by setting lower bits.
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